FPGA Cyclone IV DueProLogic - Laub Khawm & LED: 5 Kauj Ruam

2024 Tus sau: John Day | [email protected]. Kawg hloov kho: 2024-01-30 09:24

Hauv qhov kev qhia no, peb yuav siv FPGA los tswj cov LED sab nrauv. Peb yuav ua raws cov haujlwm hauv qab no

(A) Siv lub pob nyem ntawm FPGA Cyclone IV DuePrologic los tswj LED.

(B) Flash LED qhib & tawm ib ntus

Video demo

Lab ntawv qhia zaub mov:

Kauj Ruam 1: Tsim Cov Hluav Taws Xob Hluav Taws Xob

Kauj Ruam 2: Txheeb Tus Pin Planner thiab Kho Verilog Code

Kauj Ruam 3: Kho Verilog Code

Thaum koj yuav FPGA DueProLogic, koj yuav tsum tau txais daim DVD. Tom qab koj qhib "Projects_HDL", koj yuav tsum pom thawj daim ntawv ua ntaub ntawv

Ntxiv cov cai tseem ceeb. Nws sau npe rau I/O cov chaw nres nkoj thiab muab tus lej rau cov chaw nres nkoj.

cov xov hlau tso tawm [7: 0] XIO_1, // XIO-D2-D9

tso zis hlau [5: 0] XIO_2, // XIO-D10-D12

tso zis hlau [5: 0] XIO_3, // XIO-D22-D29

input hlau [5: 0] XIO_4, // XIO-D30-D37

input hlau [5: 0] XIO_5, // XIO-D38-D45

tso zis hlau [4: 0] XIO_6_OUT, // XIO-D46-D53

cov xov hlau [31: 5] XIO_6, // XIO-D46-D53

tso zis hlau [2: 0] XIO_7, // XIO - D69, D70, D71, D74, D75, D76

input hlau UBA, // Push Button Switches

input hlau UBB // Push Button Switches

muab XIO_1 [3] = start_stop_cntrl;

muab XIO_2 [1] = start_blinky; // LED nyem LED qhib thiab tawm

muab XIO_2 [2] = 1'b1; // tso zis siab

muab XIO_2 [3] = ~ UBA; // Laub khawm A

assign XIO_2 [4] = UBB; // Laub khawm B

muab c_enable = XIO_5 [2];

muab LEDExt = XIO_5 [5];

Tom qab ntawd peb yuav tsum teev sijhawm ncua sijhawm. Tawm tswv yim tus lej timer qub thiab sau lub sijhawm ua haujlwm tshiab

//-----------------------------------------------

// LED Blinky pib

//-----------------------------------------------

/*

ib txwm @(posedge CLK_66 lossis negedge RST)

pib

yog (! RST)

start_blinky <= 1'b0;

lwm tus

pib

yog (control_register [7: 4]> 0)

start_blinky <= 1'b1;

lwm tus

start_blinky <= 1'b0;

kawg

kawg

*/

reg [31: 0] ex;

pib pib

ex <= 32'b0;

start_blinky <= 1'b0;

kawg

ib txwm @(posedge CLK_66)

pib

ex <= ex + 1'b1;

yog (ex> 100000000) // nyem rau/tawm ~ 1.6 vib nas this, moos 66MHz

pib

start_blinky <=! start_blinky;

ex <= 32'b0;

kawg

kawg

//-----------------------------------------------

// LED ncua sij hawm timer

//-----------------------------------------------

/*

ib txwm @(posedge CLK_66 lossis negedge RST)

pib

yog (! RST)

led_delay_counter <= TIMER_LOW_LIMIT;

lwm tus

pib

yog (xeev [SELECT_MODE])

led_delay_counter <= timer_value;

lwm yam yog (xeev [WAIT_FOR_TIMER])

led_delay_counter <= led_delay_counter - 1'd1;

kawg

kawg*/

Kauj Ruam 4: Txheeb Cov Verilog Code

Nias "Pib Sib Sau Ua Ke" hauv Quartus, tsis muaj lus yuam kev yuav tsum tsim.

Yog tias koj tau txais cov lus yuam kev hais txog ntau tus pin. Mus rau Cov Haujlwm -> Ntaus -> Ntaus thiab Pin Xaiv -> Dual -Purpose Pins -> hloov tus nqi ntawm tus pin tsim nyog rau "Siv raws li I/O li niaj zaus".

Tom qab muab tso ua ke, koj yuav tsum tau txais cov ntaub ntawv pof tso tawm ncaj qha. Yog tias koj lub software tsis hloov kho tshiab, koj yuav tau txais cov ntaub ntawv sof nkaus xwb. Thaum nws tshwm sim, nyem "Cov Ntaub Ntawv" hauv Quartus -> "hloov cov ntaub ntawv programming". Hloov cov chaw uas tau cim los ntawm cov thawv liab.

Kauj Ruam 5: Cia Sim Sim

Tom qab tag nrho, nws yuav tsum ua haujlwm !!! LED daj yog ib txwm nyob. LED liab tab tom ci ntsa iab. Qhov xiav LED raug kaw yog tias koj nias lub pob B. Lub LED ntsuab qhib yog tias koj nias lub pob A.