Kev Siv Hluav Taws Xob Ua Tau Zoo Tshaj Tawm Txoj Kev Teeb: 8 Kauj Ruam

2024 Tus sau: John Day | [email protected]. Kawg hloov kho: 2024-01-30 09:26

Peb lub hom phiaj nrog txoj haujlwm no yog txhawm rau tsim qee yam uas yuav txuag tau zej zog lub zog thiab nyiaj txiag. Tsab ntawv tsa suab qhib txoj kev teeb yuav ua ob yam no. Txhua lub teb chaws lub zog tau raug pov tseg ntawm txoj kev teeb pom kev zoo ntawm txoj kev uas tsis muaj dab tsi. Peb txoj kev teeb pom kev kom ntseeg tau tias lub teeb tsuas yog thaum xav tau, txuag cov zej zog suav tsis txheeb. Siv lub suab ntsuas, lub kaw lus qhib lub teeb tsuas yog thaum muaj tsheb. Kuj rau kev nyab xeeb ntawm cov neeg taug kev, peb tau siv lub khawm hla uas tig rau txhua lub teeb ntawm txoj kev. Cov theem hauv qab no yuav taug koj txoj hauv kev uas peb tsim thiab tsim peb cov qauv qis ntawm txoj haujlwm siv Vivado thiab Basys 3 board.

Kauj Ruam 1: Lub Thawv Dub

Peb pib qhov haujlwm no los ntawm kev kos kab duab kab ntawv dub yooj yim. Daim duab lub thawv dub tsuas yog qhia cov tswv yim thiab cov txiaj ntsig peb lub kaw lus yuav tsum ua kom tiav txhua cov txheej txheem tsim nyog. Peb sim ua kom peb tsim qauv yooj yim thiab yooj yim li sai tau. Peb peb lub tswv yim nkag mus suav nrog lub tsheb npav ntawm lub cim ntsuas (4 rau peb cov qauv qis), tus neeg taug kev hla lub khawm, thiab lub moos nkag. Ntawm lwm sab peb qhov tso tawm ib leeg yog lub tsheb npav LED teeb sawv cev rau peb cov teeb pom kev. Rau cov qauv no peb siv qhov xwm txheej ntawm 16 txoj kev teeb pom kev yooj yim vim tias qhov ntawd yog tus lej ntau tshaj plaws hauv kev tsim tawm LED ntawm Basys 3 board. Thaum kawg, siv daim duab no peb tuaj yeem tsim peb li Vivado project, qhov chaw, thiab txwv cov ntaub ntawv nrog cov tswv yim tsim nyog thiab tso tawm.

Kauj ruam 2: Cheebtsam

Hauv cov kauj ruam no peb dhia tob tob tshuaj xyuas cov khoom tsim los ntawm peb daim duab dub lub thawv. Peb thawj feem yog VHDL cov ntaub ntawv muaj D flip-flops. D flip-flops tsuas yog siv lub teeb liab dab tsi uas tau nkag mus rau lawv los ntawm lub ntsuas cua ntawm qhov nce ntawm lub moos, thiab kaw cov ntaub ntawv ntawd mus txog rau tom ntej nce ntug. Qhov no ua rau peb cov lus nkag siab nkag siab los ntawm qhov ua rau LED tso tawm los ntawm "flickering". Tsis tas li, peb tso ib qho D flip-flop ntawm lub pob khawm teeb liab kom ua rau LED nyob li ntawm 5-7 vib nas this tom qab lub pob raug thawb. Peb kuj tau khiav qhov no los ntawm kev faib lub moos.

qhov chaw clk_div2 yog Port (clk: hauv std_logic; sclk: tawm std_logic); kawg clk_div2;

architecture my_clk_div ntawm clk_div2 yog

qhov max_count: integer: = (300000000); teeb liab tmp_clk: std_logic: = '0'; pib my_div: txheej txheem (clk, tmp_clk) sib txawv div_cnt: integer: = 0; pib yog (nce_edge (clk)) ces yog (div_cnt = MAX_COUNT) ces tmp_clk <= tsis tmp_clk; div_cnt: = 0; lwm qhov div_cnt: = div_cnt + 1; kawg yog; kawg yog; sclk <= tmp_clk; kawg txheej txheem my_div; kawg my_clk_div;

Peb qhov kawg ntawm daim duab no yog tus cwj pwm VHDL cov ntaub ntawv muaj cov xwm txheej rau cov txiaj ntsig raws li kev teeb tsa ntawm cov teeb liab nkag.

Kauj Ruam 3: D Flip-Flops

Plaub lub flip-flops txuas nrog cov cim qhia yog qhov tseem ceeb rau kev ua haujlwm ntawm peb cov kab ke. Raws li tau hais los yav dhau los, nrog cov ntsuas lub suab rhiab thiab khawm hla, lub flip-flops siv cov xaum kom tsuas yog tso tawm peb cov teeb liab tawm ntawm qhov nce ntawm lub moos. Qhov laj thawj txuas ntxiv no txhais tau tias peb cov teeb hauv txoj kev tuaj yeem nyob rau lub sijhawm teev tseg tom qab tau cuam tshuam los ntawm kev nrawm. Tus lej rau D-Flip Flop yog qhov yooj yim zoo nkauj:

pib txheej txheem (CLK) pib yog nce_edge (CLK) ces Q <= D; kawg yog; txheej txheem kawg;

Txhua yam tuaj yeem suav ua ib qho yog cov lus. Thaum peb muaj daim ntawv no, peb tsim cov txheej txheem VHDL cov ntaub ntawv muaj tag nrho plaub ntawm peb qhov tsim nyog flip-flops:

pib DFF0: Daim ntawv qhia chaw nres nkoj DFF (CLK => CLK, D => D (0), Q => Q (0)); DFF1: DFF chaw nres nkoj daim ntawv qhia (CLK => CLK, D => D (1), Q => Q (1)); DFF2: Daim ntawv qhia chaw nres nkoj DFF (CLK => CLK, D => D (2), Q => Q (2)); DFF3: Daim ntawv qhia chaw nres nkoj DFF (CLK => CLK, D => D (3), Q => Q (3));

kawg Tus Cwj Pwm;

Qhov no pab khaws peb tus tswv cov ntaub ntawv txheej txheem uas peb coj ua ke tag nrho cov txheej txheem kev ua haujlwm kom huv thiab zoo dua.

Kauj ruam 4: Cov xwm txheej

Txhawm rau ua kom peb cov cai nruj thiab muaj txiaj ntsig peb tau sau tag nrho peb cov xwm txheej hauv ib nqe lus nkaus xwb. Rau peb cov qauv txo qis, peb muaj 16 qhov ua tau ntawm LED teeb tsa teeb tsa raws li txhua lub suab txav txav yog lub luag haujlwm rau ib pawg ntawm 4 LED's.:

cov ntaub ntawv NMS yog thaum "1111" => LED teeb LED teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo teeb pom kev zoo rooj plaub xaus;

Kauj Ruam 5: Kev txwv

Txhawm rau txhawm rau hais kom raug koj li kev tawm tswv yim thiab kev siv Vivado, koj yuav tsum siv cov ntaub ntawv txwv tsis pub hais qhia txhua lub chaw nres nkoj, cov nyees khawm, LED's, thiab lub moos uas tau siv.

set_property PACKAGE_PIN W5 [get_ports CLK] set_property IOSTANDARD LVCMOS33 [get_ports CLK]

set_property PACKAGE_PIN U16 [get_ports {LED [0]}] set_property IOSTANDARD LVCMOS33 [get_ports {LED [0]}] set_property PACKAGE_PIN E19 [get_ports {LED [1]}] set_property IOSTANDARD LVCMOS33 [get_ports] PETAG U19 [get_ports {LED [2]}] set_property IOSTANDARD LVCMOS33 [get_ports {LED [2]}] set_property PACKAGE_PIN V19 [get_ports {LED [3]}] set_property IOSTANDARD LVCMOS33 [get_ports {LED [3]}] set_property WACKAG get_ports {LED [4]}] set_property IOSTANDARD LVCMOS33 [get_ports {LED [4]}] set_property PACKAGE_PIN U15 [get_ports {LED [5]}] set_property IOSTANDARD LVCMOS33 [get_ports {LED [5]}] set_property PACKAGE_P14 LED [6]}] set_property IOSTANDARD LVCMOS33 [get_ports {LED [6]}] set_property PACKAGE_PIN V14 [get_ports {LED [7]}] set_property IOSTANDARD LVCMOS33 [get_ports {LED [7]}] set_property PACKAGE_PIN V13 [tau txais] 8]}] set_property IOSTANDARD LVCMOS33 [get_ports {LED [8]}] set_property PACKAGE_PIN V3 [get_ports {LED [9]}] set_property IO STANDARD LVCMOS33 [get_ports {LED [9]}] set_property PACKAGE_PIN W3 [get_ports {LED [10]}] set_property IOSTANDARD LVCMOS33 [get_ports {LED [10]}] set_property PACKAGE_PIN U3 [get_ports {LED [11]}] set_perty [get_ports {LED [11]}] set_property PACKAGE_PIN P3 [get_ports {LED [12]}] set_property IOSTANDARD LVCMOS33 [get_ports {LED [12]}] set_property PACKAGE_PIN N3 [get_ports {LED [13]}] set_property IOSTANDARD LVCM33 {LED [13]}] set_property PACKAGE_PIN P1 [get_ports {LED [14]}] set_property IOSTANDARD LVCMOS33 [get_ports {LED [14]}] set_property PACKAGE_PIN L1 [get_ports {LED [15]}] set_property IOSTANDARD LED LVCMOS33 [15]}]

set_property PACKAGE_PIN U18 [get_ports BTN] set_property IOSTANDARD LVCMOS33 [get_ports BTN]

set_property PACKAGE_PIN A14 [get_ports {MS [0]}] set_property IOSTANDARD LVCMOS33 [get_ports {MS [0]}] set_property PACKAGE_PIN A16 [get_ports {MS [1]}] set_property IOSTANDARD LVCMOS33 [get_ports] PETAG B15 [get_ports {MS [2]}] set_property IOSTANDARD LVCMOS33 [get_ports {MS [2]}] set_property PACKAGE_PIN B16 [get_ports {MS [3]}] set_property IOSTANDARD LVCMOS33 [get_ports {MS [3]}]

Kauj Ruam 6: Cov Ntaub Ntawv Tseem Ceeb

Hauv cov ntaub ntawv tseem ceeb no peb nqa ua ke txhua qhov khoom siv sib txuas cov ntaub ntawv hais txog yav dhau los. Cov ntaub ntawv no ua haujlwm raws li cov qauv txheej txheem ua ke cov khoom sib txawv.

Master_Final_Project yog Port (BTN: hauv STD_LOGIC; CLK: hauv STD_LOGIC; MS: hauv STD_LOGIC_VECTOR (3 downto 0); LED: tawm STD_LOGIC_VECTOR (15 downto 0)); kawg Master_Final_Project;

architecture Tus Cwj Pwm ntawm Master_Final_Project yog

tivthaiv kawg_project yog Port (--CLK: hauv STD_LOGIC; NMS: hauv STD_LOGIC_VECTOR (3 downto 0); BTN: hauv STD_LOGIC; --sw: hauv STD_LOGIC_Vector (1 downto 0); LED: tawm STD_LOGIC_VECTOR (15 downto 0) kawg tivthaiv;

tivthaiv Final_DFF yog

Chaw nres nkoj (CLK: hauv STD_LOGIC; D: hauv STD_LOGIC_Vector (3 downto 0); Q: tawm STD_LOGIC_Vector (3 downto 0)); kawg tivthaiv;

teeb liab DFF02proj30: STD_LOGIC;

teeb liab DFF12proj74: STD_LOGIC; teeb liab DFF22proj118: STD_LOGIC; teeb liab DFF32proj1512: STD_LOGIC;

pib

DFF0: Final_DFF chaw nres nkoj daim ntawv qhia (CLK => CLK, D (0) => MS (0), D (1) => MS (1), D (2) => MS (2), D (3) => MS (3), Q (0) => DFF02proj30, Q (1) => DFF12proj74, Q (2) => DFF22proj118, Q (3) => DFF32proj1512); Proj0: final_project port map (NMS (0) => DFF02proj30, NMS (1) => DFF12proj74, NMS (2) => DFF22proj118, NMS (3) => DFF32proj1512, BTN => BTN, LED => LED); kawg Tus Cwj Pwm;

Kauj Ruam 7: Sib dhos

Kev sib dhos kho vajtse rau txoj haujlwm no tsawg kawg. Tsuas yog cov khoom xav tau yog raws li hauv qab no:

1. Basys 3 board (1)

2. Pheej yig suab sensors uas tuaj yeem pom ntawm amazon ntawm no. (4)

3. Txiv neej-rau-poj niam ua (4)

Sib dhos:

1. Txuas 4 tus txiv neej coj mus rau PMod header JB ports 1-4 (Saib Daim Duab).

2. Txuas tus poj niam xaus rau txhua qhov kev txav suab tus pin tso tawm.

Kauj Ruam 8: Thauj Txoj Haujlwm

Tam sim no peb tau npaj los thauj VHDL tus tswv cov ntaub ntawv rau Basys 3 board. Nco ntsoov ua kom muaj kev sib sau ua ke, ua tiav, thiab tsim cov ntawv tshawb xyuas me ntsis rau txhua qhov ua yuam kev. Yog tias txhua qhov ua tiav, qhib tus thawj tswj hwm kho vajtse thiab teeb tsa lub cuab yeej Basys 3. Tam sim no koj qhov project tiav lawm!